[Buildroot] [git commit] package/elf2flt: handle more relocations

Thomas Petazzoni thomas.petazzoni at bootlin.com
Mon Aug 7 20:24:05 UTC 2023


commit: https://git.buildroot.net/buildroot/commit/?id=dd97dfc79906a3bfb72c6cdd2678ed6353d2c56e
branch: https://git.buildroot.net/buildroot/commit/?id=refs/heads/master

See here the comment:
https://github.com/uclinux-dev/elf2flt/pull/24

Fixes following autobuild failure:
http://autobuild.buildroot.net/results/c16/c161f191d85f9d064626ee6fcfebea61d916e434/

Signed-off-by: Waldemar Brodkorb <wbx at openadk.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni at bootlin.com>
---
 ...d-more-relocations-required-to-be-handled.patch | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/package/elf2flt/0008-riscv64-add-more-relocations-required-to-be-handled.patch b/package/elf2flt/0008-riscv64-add-more-relocations-required-to-be-handled.patch
new file mode 100644
index 0000000000..74d3085d08
--- /dev/null
+++ b/package/elf2flt/0008-riscv64-add-more-relocations-required-to-be-handled.patch
@@ -0,0 +1,40 @@
+From 5acfed0012f2fff9801b25403bd8a5e1c2ccfea2 Mon Sep 17 00:00:00 2001
+From: Waldemar Brodkorb <wbx at openadk.org>
+Date: Mon, 7 Aug 2023 09:30:34 +0200
+Subject: [PATCH] riscv64: add more relocations required to be handled
+
+Signed-off-by: Waldemar Brodkorb <wbx at openadk.org>
+Upstream: https://github.com/uclinux-dev/elf2flt/pull/24
+---
+ elf2flt.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/elf2flt.c b/elf2flt.c
+index 6685bff..6b3bea4 100644
+--- a/elf2flt.c
++++ b/elf2flt.c
+@@ -850,11 +850,21 @@ output_relocs (
+ 				default:
+ 					goto bad_resolved_reloc;
+ #elif defined(TARGET_riscv64)
++				case R_RISCV_NONE:
+ 				case R_RISCV_32_PCREL:
++				case R_RISCV_ADD8:
++				case R_RISCV_ADD16:
+ 				case R_RISCV_ADD32:
+ 				case R_RISCV_ADD64:
++				case R_RISCV_SUB6:
++				case R_RISCV_SUB8:
++				case R_RISCV_SUB16:
+ 				case R_RISCV_SUB32:
+ 				case R_RISCV_SUB64:
++				case R_RISCV_SET6:
++				case R_RISCV_SET8:
++				case R_RISCV_SET16:
++				case R_RISCV_SET32:
+ 					continue;
+ 				case R_RISCV_32:
+ 				case R_RISCV_64:
+-- 
+2.39.2
+



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